Galois field (GF) arithmetic is used to implement critical arithmeticcomponents in communication and security-related hardware, and verification ofsuch components is of prime importance. Current techniques for formallyverifying such components are based on computer algebra methods that provedsuccessful in verification of integer arithmetic circuits. However, thesemethods are sequential in nature and do not offer any parallelism. This paperpresents an algebraic functional verification technique of gate-level GF (2m )multipliers, in which verification is performed in bit-parallel fashion. Themethod is based on extracting a unique polynomial in Galois field of eachoutput bit independently. We demonstrate that this method is able to verify ann-bit GF multiplier in n threads. Experiments performed on pre- andpost-synthesized Mastrovito and Montgomery multipliers show high efficiency upto 571 bits.
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